In some circuits a first transistor may be connected between a first point of operating potential (e.g. ground) and a load terminal, and a second transistor may be connected between the load terminal and a second point of operating potential (e.g. a very high positive voltage). Where the first and second transistor switches are of the same conductivity type, control circuits for the first transistor can be referenced to ground, but the control circuits for the second transistor must be referenced to the voltage at the load terminal. Usually, the sources of control signals for the transistors are referenced to ground so that the control signal for the first transistor, that is the one referenced to ground, can be directly applied to its control electrode. However, since the second transistor is referenced to the load terminal voltage, the control signal to turn it on or off must have its level shifted so that it is referenced to the voltage at the load terminal rather than to ground.
One way of doing this is to derive narrow voltage pulses at the beginning and end of each control signal which have durations equal to the time that the second transistor is to be activated, and converting these pulses to current pulses with current supplies that are referenced to ground. The current pulses are converted to voltage pulses referenced to the voltage at the load terminal by passing the current pulses through resistors that are respectively connected in series with each current supply and a D.C. operational voltage referenced to the load terminal.
When the transistors are driving an inductive load, the opening of the first switch, which is referenced to ground, induces voltage changes (transients, dv/dt, etc.) that cause currents to flow through stray capacitances and the resistors referred to so as to possibly cause false operation of a bistable circuit, in turn causing false operation of the transistor switches it controls. Because the voltages produced across the resistors occur at the same time, they are referred to as common mode voltages.
One way of coping with this problem has been to provide circuits for opening the second transistor, i.e. the one referenced to the intermediate voltage, when the common mode voltages occur, but this can result in noise induced turn-off when high voltage bus noise occurs. Alternatively, the second transistor could be closed rather than opened in response to the presence of common mode voltages, but this can result in noise induced turn-ons.
Another approach has been to make the circuits associated with the resistors identical and to design the bistable device so that it does not respond to identical signals. Unfortunately, the common mode voltages may not be identical and the circuit is sensitive to layout mismatches that may result from processing irregularities.